As the chief PCB designer resident within a company that manufactures boards, Greg Albers has unusual insight about how fabrication and assembly processes ought to influence design. He’s often asked by customers, in his position at Sierra Circuits, to recast designs that would be tricky to build as submitted, in addition to taking projects from schematics forward to achieve optimum yield.
Albers’ career spans 30 years, including stints within several major OEMS—among them a network card supplier and a manufacturer of computers and smartphones—before joining the company. He knows PCB design from the inside and outside, considering his unique experience. He’s designed thousands of boards. I asked him to pass along some basic tips, simple reminders based on the path he treads to ensure the best outcome from a manufacturing perspective.
If a board will be used merely on a benchtop as a test or development tool and only four or five are needed, then the size is irrelevant for manufacture, provided it fits on a panel, coupon width included. A design that will be produced in any quantity, however, had better take into account how it can be replicated per panel with minimum waste.
Engineers should understand the relationship of the fabrication process to design rules and to the costs of different design approaches, Albers emphasizes. The easiest and definitely the cheapest way to accomplish that is consultation with the intended manufacturer at the stackup stage. Although practically any design can be built, determining up front what architecture will result in the best yield should be the objective, certainly for volume production. Designers who take into account ahead of time how boards are built can save a good deal of money, and that economy extends beyond just fabrication charges, including fast manufacturing turnaround at the front end and heightened product reliability in the field.
Needless to say, every project starts with a schematic, a mechanical description of the board, a stackup, and a complete BOM. The bedrock of PCB design, the foundation, is footprint development, Albers advises. He refers to the data sheet for virtually every part on every BOM to leave no doubt about exact package descriptions, to create proper footprints. In fact, footprint development is the most time-consuming aspect of nearly every project.
“The spacing I use as a rule between parts is very large,” Albers points out. “When I build a footprint, I make a reference line for the maximum size of the part, extend outside that by 15 mils for the silkscreen, then 5 mils more for an assembly line, then a minimum of 15 mils beyond that for a package keep-out. That’s 35 mils between the body of one part to the edge of the next part footprint, which has the same 35-mil spacing; so that’s 70 mils in total from the body of one part to another.
Discretes ordinarily are less than that. For a connector that I know you have to get your fingers around, I may enlarge the keepout boundary by 40 mils. If it’s a right-angle connector, the keep-out accounts for clearance needed for the cable at the edge of the board, and so forth: Each part has its own keep-out value. Keeping the boundaries large certainly helps via placement, eases routing, and is better for the silkscreen, but it leaves enough latitude for me to violate the rule when necessary without jeopardizing assembly, if I need to place two parts 10-mils closer.”
Via size, spacing, and location is the most challenging task in design, not routing, not part placement. Through-hole vias impact where you can put parts on the opposite side of the board; of course, that’s a principal advantage of using blind and buried vias. There’s a point at which an HDI PCB approach becomes unavoidable for construction (generally the result of tight BGA pitch), or more economical in terms of yielding more boards per panel that counteracts the increased processing cost for multiple laminations. A board designer who understands fabrication can make a reasoned analysis.
The balance between fabrication complexity and yield per panel is not the only economic concern. Sometimes PCB designers need to push back, forcefully, against decisions by their engineering department or procurement. Albers recalls the BOM for a project at a computer company where he worked that called for a large through-hole capacitor for which there was a surface-mount substitute that would consume much less territory. The capacitor in the call-out cost $0.17 and the substitute cost $2.40 each. Procurement was adamant his group had to use the $0.17 capacitor, not the substitute. So much room was required for the part that just one board would fit on a panel, instead of two had the substitute been acceptable. It cost the company $7.40 more per board to use the cheaper part instead of the substitute.
If a board will be used merely on a benchtop as a test or development tool and only four or five are needed, then the size is irrelevant for manufacture, provided it fits on a panel, coupon width included. A design that will be produced in any quantity, however, had better take into account how it can be replicated per panel with minimum waste. If you contemplate using large panels for economy, you need to consider minimum hole and pad sizes because the tolerance across the panel may not support using 6-mil drills and small annular rings, for example. In any event, unless a board involves a BGA with a very tight pitch or a BGA with a great many connections, there’s seldom any need for a drill size smaller than 8 mils.
Many designers don’t realize the solder mask determines design rules, not copper-to-copper or pad-to-pad minimums, Albers points out. “The smallest spoke of a solder mask is 4 mils, period. You can’t go below that whether or not you use standard LPI solder mask or laser-defined solder mask or there will be registration issues. You can decide to use a laser-defined solder mask to provide the better precision than LPI, which is unavoidable if there’s a BGA with tight spacing, but that costs more. Getting the most for your money should be the objective when you need production quantities. However, unless you really know fabrication, collaborate with your manufacturer before you design.
Albers notes that engineers often pick BGAs with the finest pitch available, figuring the smallest packages will conserve board territory. However, the breakout for larger packages in many cases will actually result in less area consumed. Package selection for complex devices ought to involve both the circuit designer and the PCB layout designer. “As a rule of thumb, to estimate the number of layers a board will include, count the number of ball rows in the most complex BGA. You’ll need a power plane per supply value for the part, and associated ground planes. That package guides the project,” he said.
Albers places and routes the power section of designs first, keeps most of the active devices on one side of the board and discretes on the other with assembly in mind, and can almost always accomplish a design without turning to fine trace and space widths.
Albers’ advice in a nutshell? Think big.
To learn more about board design rules and routing constraints, read our blog on pcb constraints settings management in altium designer and allegro.