If Sierra Circuits was making burgers, we would make the world’s best burgers, just like we make the world’s best PCBs. We would prepare each layer of your burger with care and tenderness, just like the layers on our PCB stack-up. Our burgers will come in different sizes and shapes with a variety of ingredients, and our secret sauce covered with our very own baked bread. Just like we use different types of metal cores for our PCB, similarly, we will offer a variety of patties.
Now you might be wondering how we make the world’s best boards. Let me reveal our secret, it’s all about the PCB stack-up. Stackup is an important part of the PCB design and manufacturing process. A good stack-up design is key to reduce electromagnetic emission (EM) from electronic circuitry. Thus, improving the overall signal integrity of the circuit board. On the other hand, a poor stack-up design can lead to higher EM emission and signal losses. A job of every PCB designer must include reducing EM emission from the loops on the PCB caused due to the differential-mode noise and common-mode emission.
Modern-day electronics revolve around the miniaturization of electronic assemblies. There is a widely popular trend among electronic manufacturers to pack more processing power into a small package. Strictly in electronics terms, the smaller the form factors the better. Industry experts predict that we will reach the physical limitations of electronic components at transistor-level sometime soon. Though, we believe a PCB designer can do miracles at the design level with the help of an expert fabricator like us to make PCBs smaller and denser.
Often ignored, it is important to understand the difference between anHDI stack-up and a standard stack-up. The primary reason being the long list of advantages associated with HDI technology stack-up including, higher component density per square inch, lower aspect ratio, and lesser number of layers compared with standard stack-up.
Standard stack-up design is dependent on the number of signal layers present. For standard PCB stack-up, key parameters include the number of layers, number of ground and power planes, frequency of the circuit, the sequence of the layers, and emission requirements. Some of the additional parameters include spacing between the layers and a shielded or unshielded enclosure.
Key design rules for standard stack-up include keeping space between signal layers and use large cores to avoid EMC issues. Worth mentioning, the key advantage of standard stack-up is the shielding for the inner layers by the planes on the outer layers. While, the major disadvantage includes the reduction in the ground plane due to the presence of component mounting pads, particularly on a high-density PCB.
An HDI stack-up, a cutting-edge technology, is revolutionizing multilayer PCB design and manufacturing. HDI offers a sequential build-up for stack-up, thus allowing a larger variety of design choices. HDI simplifies design architecture for complex boards. Additionally, HDI stack-up uses blind and buried, and stacked and staggered via. The HDI stack-up architecture follows a slightly different approach compared to the standard stack-up. For HDI stack-up, the number of layers is determined by the number of ball grid array (BGA) or the highest pin count device. Other factors affecting stack-up include the number of signal layers and the number of power and ground layers.
Additionally, it is recommended that HDI stack-up should have the number of planes and signal layers either odd or even (both even is the best for a balanced structure). These layers are supposed to be symmetrically placed. Microvia structures can have a big impact on the manufacturing process since they directly affect the number of lamination cycles, unlike the standard stack-up. Of course, HDI does not require complex architectures. One of the most common mistakes designers make is creating architectures that are unnecessarily complex.
Sierra Circuits’ presents our very own HDI Stackup Planner. Sierra’s stack-up planner will ensure that your HDI PCB design will be manufacturable the very first time. Sierra created the Technology Level categories to give you a better sense of the level of technical sophistication required for different traces and different via sizes. Because HDI PCBs are worth the additional cost, try Sierra Circuits’ free HDI Stackup Planner!
The HDI stack-up architecture is differentiated into stack-up classes depending on the number of board layers and sequential lamination for HDI boards. These classes are determined by formula X-N-X, where x is the number of laminations required on both sides of the board and N is the number of signal layers. It must be noted that with the increase in the requirement for sequential lamination, the board price will increase.
So, the single lamination built with the help of laser drills will be more profitable. This stack-up class is a no-brainer in terms of utilizing microvias in the least expensive way possible. Using a laser drill will allow the designer to achieve a smaller pad and via size. This can help ease some of the design restrictions and reduce your design time.
The more variations you have on the layers where micro-vias start and stop at, the greater number of sequential laminations are needed for the PCB manufacturing. Any layer on which a microvia starts or stops requires a sub-construction, and each sub-construction will require an extra lamination cycle. (The lamination process is defined as pressing a set of copper layers with uncured dielectrics in between two adjacent copper layers under heat and pressure to form a multilayer PCB laminate).
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- Planning your stack-up and microvia structure
- Choosing the right materials
- Signal integrity and controlled impedance in HDI
- Manufacturing considerations for higher yields
The cost and complexity of the circuit board increase with the increase in the process steps associated with the stack-up. Additional manufacturing processes also mean more yield loss. N represents the number of layers in the first or base lamination (or core lamination) and 0 tells that there are no sequential lamination steps and no extra dielectric and copper layers are added. Following is an example of 0-N-0 stack-up,
In 1-N-1 type of stack-up, the ‘1’ represents one sequential lamination on either side of the core. One sequential lamination adds two copper layers for a total of N+2 layers. This stack-up design does not feature stacked vias. There is one extra lamination with no stacking of the vias. The buried via has been mechanically-drilled. There is no need to use a conductive fill for the via. It will naturally fill with the dielectric material. The second lamination adds the top and bottom layers. Then, we finish up with a final mechanical drill. Here are steps for 1-N-1 stack-up,
- The core is laminated. (The core can be only two layers, so no lamination.)
- The core is mechanically drilled.
- The mechanical drill is plated.
- Layer two is imaged/etched.
- The sequential lamination adds two additional layers. (The mechanical drill is now a buried via.)
- The laser-drilled vias are formed.
- The final through-hole via is formed.
- The laser drill and the through-holes are plated.
The PCB manufacturer plans the right amount of prepreg between layers one and two so the resin flows into the buried via.
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- Explanations of signal integrity issues
- Understanding transmission lines and controlled impedance
- Selection process of high-speed PCB materials
- High-speed layout guidelines
Whether its HDI or standard stack-up board, following certain guidelines in accordance with the application and its requirements is the best possible way to implement the PCB stack-up design. We have listed a few guidelines to help you to achieve a possible PCB stack-up design,
A) The number of signal layers matters
PCB stack-up is dependent on the number of signal layers present in the design. Signal layers changes in accordance with the application of the PCB. For instance, high-speed signal or high-power applications may require a greater number of layers compared to low-speed signal levels.
Low pitch high pin-count complex devices like BGAs usually require a greater number of signal layers. Signal integrity requirements like extremely low crosstalk may also lead to an increased number of signal layers.
Mixed-signal types – substantial analog as well as digital signals will require separation between the two types and are likely to increase the # of signal layers.
B) The number of ground and power layers:
The use of Ground and Power planes allows the designer to allocate signal layers purely for signal routing; they also reduce the DC resistance in power and ground rails, thereby ensuring less DC voltage drops at the devices.
The ground layer is the plane of copper in the PCB that is connected to the ground connection of the power supply. A power layer is a flat plane of copper in the PCB connected to the power supply rail.
The planes also provide signal return paths for time-varying and high-frequency signals and help to considerably reduce noise and signal crosstalk, thereby improving SIGNAL INTEGRITY. Power planes also improve the capacitive decoupling ability of the circuits in the PCB. Planes also improve EMC performance by reducing EM radiation.
Also read our article on 7 Considerations for PCB Power Supply Design
C) Controlled impedance traces
Controlled impedance is the characteristic impedance of a transmission line formed by a PCB trace and its associated reference planes. It is relevant when high-frequency signals propagate on the PCB transmission lines. A uniform controlled impedance is important for achieving good signal integrity, which is the propagation of signals without significant distortion.
When the reference plane is not the next layer over, there is a danger that another copper feature on the next layer becomes the reference.
From the manufacturing standpoint, we need to keep a uniform etch across the length of the line, both in the width and the trapezoidal affect. This is the reason for the etching tolerances and uniformity.
D) Sequential layer arrangement
Another key aspect of the stack-up design is the sequential layer arrangement. Arranging high-speed signal layers depending on the thickness of microstrips is one of the key parameters that a designer must consider before routing. Placing signal layers below the power plane will allow tight coupling.
For precise layer arrangement, keep a minimum distance between the power and the ground planes. Other key parameters include avoiding placement of two signal layers adjacent to each other and building symmetric stack-up of the top and bottom layers.
In sequential lamination, try to limit the number of lamination steps as it becomes more expensive and time-consuming.
E) Determining layer material types
An important consideration for your PCB stack-up is the thickness of each signal layer. This should be established in conjunction with determining thicknesses for prepreg and core(s). There are standard thicknesses, as well as other properties, for different circuit board material types. Your process for selecting PCB materials should include these electrical, mechanical, and thermal properties.
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